1. The Field of the Invention
The present invention relates to analog integrated circuit design, and more particularly, to voltage reference circuits that use switched capacitor configurations to provide desired temperature dependencies in the output voltage, and that uses transconductance circuits to aid in generating the reference voltage.
2. Background and Related Art
Analog circuit technology has revolutionized the way people work and play and has contributed enormously to the advancement of humankind. In many analog circuit designs, it is often desirable to have access to a voltage source other than the voltages that are supplied to the circuit as a whole (often termed Vdd and Vss). Often, the voltage desired is even higher than the highest supply voltage. To generate such high voltages, charge pumps are often used.
FIG. 7 illustrates a conventional voltage generation circuit 700 in accordance with the prior art. The voltage generation circuit 700 is configured to supply a relatively high voltage Vout on the output terminal 701. The voltage generation circuit 700 includes an amplifier 702 having an inverting input terminal 703, a non-inverting input terminal 704, and an output terminal 705. A reference voltage source 706, which supplies a voltage Vref, is coupled to the non-inverting input terminal 704 of the amplifier 702. The inverting input terminal 703 of the amplifier 702 is coupled to an intermediate node in a voltage divider comprising two resisters 707 and 708 having respective resistances R1 and R2. The output terminal 705 of the amplifier 702 is coupled to a control circuit 708 that controls a charge pump 709. The charge pump 709 provides charge on the output terminal 701 of the voltage regulation circuit 700 so as to generate the output voltage Vout.
During operation, when the output voltage Vout exceeds Vref times (R1+R2)/R1, the voltage at the inverting terminal 703 of the amplifier 702 is more than the voltage at the non-inverting terminal 704 of the amplifier 702. Accordingly, the amplifier 702 generates a low voltage at the output terminal 705, which causes the control circuit 708 to cause the charge pump 709 to generate less charge. Conversely, when the output voltage Vout is less than Vref times (R1+R2)/R1, the voltage at the inverting terminal 703 of the amplifier 702 is less than the voltage at the non-inverting terminal 704 of the amplifier 702. Accordingly, the amplifier 702 generates a high voltage at the output terminal 705, which causes the control circuit 708 to cause the charge pump 709 to generate more charge. Accordingly, the voltage at the output terminal 701 of the voltage regulator circuit tends to stabilize at Vref times (R1+R2)/R1.
The voltage regulator circuit 700 requires a reference voltage source 706 which can involve extensive circuitry. Furthermore, the reference voltage Vref, the amplifier 702, the control circuit 708 and the charge pump 709 may have temperature dependencies that are often not desired. Accordingly, what would be advantageous are circuits that allow for the generation of a voltage having particular desired temperature dependences.
FIG. 8 illustrates a switched capacitor voltage reference circuit 800 that allows for better control and predictability over desired temperature dependencies. The desired temperature dependences are obtained by operating the circuit in two phases or time periods and switching capacitor configurations for each time period. During the first time period also referred to as the reset phase, clock signal CLK1 is high (and the signal CLK2 is low) indicating that the switches designated by CLK1 are closed (and the switches designated by CLK2 are open). Note that the switch configuration of FIG. 8 represents the switch configuration during the reset phase. On the other hand, during the second time period also referred to herein as the generation phase, clock signal CLK2 is high (and the signal CLK1 is low) indicating that the switches designed by CLK2 are closed (and the switches designated by CLK1 are open), which is the opposite switch configuration as shown in FIG. 8. The clock signals CLK1 and CLK2 for both the reset and generation phases are illustrated as curves 808 and 809, respectively.
During the reset phase, current from current source 801 (having a magnitude that is xe2x80x9cnxe2x80x9d times the magnitude of current from the current source 802) is passed through the base-emitter region of the bipolar transistor 805. During the generation phase, current from the current source 802 is passed through the base-emitter region of the bipolar transistor 805. During the reset phase, the emitter terminal of bipolar transistor 805 is coupled to the left terminals of both capacitors 803 and 804. During the generation phase, the emitter terminal of bipolar transistor 805 is still coupled to the left terminal of capacitor 803. However, the left terminal of the capacitor 804 is coupled to Vss during the generation phase. The right terminals of the capacitors 803 and 804 are coupled together and to the inverting terminal of amplifier 806. The non-inverting terminal of the amplifier 806 is coupled to Vss. During the reset phase, the output terminal of the amplifier 806 is coupled back to the inverting terminal of the amplifier 806 thereby rendering the amplifier 806 in its unity gain configuration to define a first feedback loop. A capacitor 807 is also coupled between the output terminal of the amplifier 806 and its inverting input terminal thereby defining a second feedback loop.
If the generation and reset phases do not overlap, the output voltage Vout will generally be defined by the following Equation 1:                     Vout        =                              C2            C3                    ⁢                      (                          Vbe1              +                                                C1                  C2                                ⁢                Ut                *                                  ln                  ⁡                                      (                    n                    )                                                                        )                                              (        1        )            
where:
C1 is the capacitance of capacitor 803;
C2 is the capacitance of capacitor 804;
C3 is the capacitance of capacitor 807;
Vbe1 is the base-emitter voltage of bipolar transistor 805 during the reset phase;
Ut is the thermal voltage; and
n is the ratio of the magnitude of the current supplied by current supply 801 to the magnitude of the current supplied by current supply 802.
The terms Ut*ln(n) and Vbe1 have opposite temperature dependencies (i.e., one increases with increasing temperature, and the other decreases with increasing temperature). Accordingly, by designing the size of capacitors 803 and 804 for an appropriate ratio of C1 to C2, a predictable temperature dependency of Vout may be obtained. The magnitude of the output voltage Vout may be obtained by designing the size of capacitor 804 and 807 for an appropriate ratio of C2 to C3.
Accordingly, the switched capacitor voltage reference circuit 800 provides a significant advancement in the art by allowing a reference voltage to be generated that has predictable temperature dependencies. Similar switched capacitor voltage regulator circuits have been described in which currents of different magnitudes are multiplexed through multiple bipolar transistors. The output voltage generated by such switched capacitor voltage regulator circuits are, however, limited. For example, the output voltage cannot exceed the supply voltage Vdd, and depends on the output range of the amplifier 806. Furthermore, the output voltage of such switched capacitor voltage regulator circuits only generate the desired voltage during the generation phase, but not during the reset phase. Accordingly, circuits that use the reference voltage must take into account the transient nature of the reference voltage.
What would therefore be advantageous is a circuit that supplies a reference voltage that not only has a predictable temperature dependency, but also is not limited to the supply voltage of the circuit. It would further be advantageous if that circuit provided a reference voltage that was present at all times whether during the generation phase or during the reset phase.
The foregoing problems with the prior state of the art are overcome by the principles of the present invention, which are directed towards a switched capacitor voltage reference circuit. The switched capacitor voltage reference circuit operates in a reset phase and a generation phase. The switched capacitor voltage reference circuit generates a reference voltage that is relatively predictable with temperature variation, and which is not limited to the supply voltage, and which does not require separate circuitry for generating another reference voltage.
The switched capacitor voltage reference circuit includes an amplifier that has its output terminal coupled directly or indirectly (e.g., through a non-return to zero circuit) to its inverting input terminal during the reset phase, but not during the generation phase. The non-inverting input terminal of the amplifier may be coupled to a substantially fixed voltage source. A charge injection reduction circuit may be coupled to the non-inverting input terminal of the amplifier so as to reduce charge injection within the amplifier.
A first and second capacitor each has one terminal coupled to the inverting input terminal of the amplifier. A PN junction (such as the base-emitter terminal of a bipolar transistor) has a positive (or negative) terminal that is coupled to a second terminal of the first capacitor. The other terminal of the PN junction is coupled to a substantially fixed voltage source. The second terminal of the second capacitor is configured to be capacitively coupled to the positive (or the negative) terminal of the PN junction during the reset phase and to a negative (or a positive) terminal of the PN junction during the generation phase.
Two current sources providing different current magnitudes are multiplexed through the PN junction, with the larger current supplied through the PN junction during the reset phase, and with the lesser current supplied through the PN junction during the generation phase.
Unlike conventional switched capacitor voltage reference circuits, the switched capacitor voltage reference circuit in accordance with the principles of the present invention includes a transconductance circuit that receives the output of the amplifier, and then generates a current based on any voltage variations at its input. Once example of such a transconductance circuit is a charge pump that is controlled by the amplifier output. The transconductance circuit provides a current at the output terminal of the switched capacitor generation circuit, which with the presence of a load capacitor, causes a stable output voltage to be applied also at the output terminal. The average current supplied by the transconductance circuit would be equal to the load current. A third capacitor capacitively couples the output terminal of the switched capacitor voltage reference circuit to the inverting terminal of the amplifier during the generation phase.
By adjusting or properly designing the capacitances of the first, second, and third capacitors, the level and temperature dependence of the generated reference voltage may be controlled. Also, the switched capacitor generation circuit allows for reference voltages that are greater than the supply voltage if the transconductance circuit were a voltage-controlled charge pump. Furthermore, the reference voltage is supplied during both the generation and reset phases. Accordingly, the principles of the present invention provide a significant advancement in the state of the art.
Additional features and advantages of the invention will be set forth in the description that follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The features and advantages of the invention may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.